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The files were squeezed with version 1.5 and may be unsqueezed to generate the original code. All necessary information is included in the library, but if you find some missing contact me at: Larry Kraemer R 2 Box 190 Jackson, MO 63755  RS-232C INTERFACING RS-232à i th mos recen versio o th EI (Electronic Industr Association standar fo lo spee seria젠 dat communication I define numbe o parameter concernin voltag levels loadin characteristic an timin relationships Typica practic require mountin femal connector (DB-25S o th chassi o th communication equipment an mal (DB-25P connector o th cabl connectin tw suc devices. Ther ar tw mai classe o RS-232à devices DTŠ (Dat Termina Equipment an DC (Dat Communication Equipment) Terminal ar typica DTE's an DCE' ma b printer o modems Typically on onl interface DT t DCE a oppose t on DT t anothe DTE o on DC t anothe DCE Ther ar way o interfacin tw lik device b buildin non-standar cable I on o th device involve i modem th 'hand-shaking line mus b supported Thes lines ma b use t allo th receivin devic t caus th transmittin devic t paus whil th receivin devic catche up. RS-232 i intende fo relativel shor (5 fee o less) relativel lo spe (19,20 bits/secon o les (BAUD) seria communication Bot asynchronou an synchronou seria encodin ar supported an Digita signal ar use a oppose t Analo signals RS-232à wil suppor simplex half-duplex o full-duplex channels. Simple channe mean tha communicatio i on way A exampl woul b receiv onl Printer I half-duple channel dat ma trave i eithe direction bu a an give tim dat wil onl b travellin i on direction Th lin mus b turne aroun befor dat ca trave i th othe direction I full-duple channel dat ma trave i bot direction simultaneously. Ther ar twent fiv circuit whic mak u th interface I th simples case a interfac ma b implemente wit a fe a tw circuits circui i define t b continuou wir fro on devic t another. DEFINITION OF THE MOST COMMON CIRCUITS 1. CG Chassis Ground This circuit is Frame Ground and insures that the two devices are at the same potential, to prevent electrical shock to the operator. This circuit is optional and is not used as the reference for any other circuit. 2. TD Transmit Data This circuit is the path whereby serial data is sent from the DTE to DCE. This circuit must be present if data is to travel in that direction. 3. RD Receive Data This circuit is the path whereby serial data is sent from the DCE to DTE. This circuit must be present if data is to travel in that direction. 4. RTS Request To Send This circuit is the signal that indicates that the DTE wishes to send data to the DCE. Note that the DTE must always be ready to accept data. Once the DTE has data to send it will set RTS to ON (logic 0), and wait for an on condition on CTS from the DCE. After sending the data the DTE will set RTS to OFF (logic 1). 5. CTS Clear To Send This circuit is the signal that indicates that the DCE is ready to accept data from the DTE. In normal operation it will be in the OFF state. When the DTE asserts RTS, the DCE will do whatever is necessary to allow the data to be sent. At this time the DCE would set CTS to the ON state, which would allow the DTE to send the data. Note that the DTE must have an incoming CTS before it can transmit. 6. DSR Data Set Ready This circuit informs the DTE that the DCE is alive and well. It is normally set to the ON state by the DCE on power-up and left there. The DTE must have an incoming DSR in order to function normally. 7. SG Signal Ground This circuit is the neutral to which all other voltages are referenced. It must be present at all times. (It is the common line for all DC voltages.) 8. DCD Data Carrier Detect This circuit is the signal whereby the DCE informs the DTE that it has an incoming carrier. It may be used by the DTE to determine if the channel is idle, so that the DTE can request it with RTS. Note that some DTE's must have DCD before they will operate. 15. TC Transmit Clock This circuit provides the clock for the transmitter section of a synchronous DTE. It may or may not be running at the same rate as the receiver clock, and must be present on synchronous interfaces. 17. RC Receiver Clock This circuit provides the clock for the receiver section of a synchronous DTE. It may or may not be running at the same rate as the transmitter clock, and must be present on synchronous interfaces. Note that both RC and TC are sourced by the DCE. 20. DTR Data Terminal Ready This circuit provides the signal that informs the DCE that the DTE is alive and well. It is normally set to the ON state by the DTE at power-up and left there. Note that a typical DCE must have an incoming DTR before it will function normally. Th followin tabl list al th informatio fo th variou circuit whic mak u th RS-232 interface. PIN NAME EIA CCITT DTE DCE FUNCTION 1 CG AA 101 == == Chassis Ground 2 TD BA 103 >> Transmit Data 3 RD BB 104 << Receive Data 4 RTS CA 105 >> Request To Send 5 CTS CB 106 << Clear To Send 6 DSR CC 107 << Data Set Ready 7 SG AB 102 == == Signal Ground 8 DCD CF 109 << Data Carrier Detect 9* << Pos Test Voltage 10* << Neg Test Voltage 11 Not Used (usually) 12+ SCDC SCF 122 << Secondary DCD 13+ SCTS SCB 121 << Secondary CTS 14+ STD SBA 118 >> Secondary TD 15# TC DB 114 << Transmit Clock 16+ SRD SBB 119 << Secondary RD 17# RC DD 115 << Receive Clock 18 Not used (usually) 19+ SRTS SCA 120 >> Secondary RTS 20 DTR CD 108.2 >> Data Terminal Ready 21* SQ CG 110 << Signal Quality 22 RI CE 125 << Ring Indicator 23* CH 111 >> Data Rate Selector CI 112 << Data Rate Selector 24* XTC DA 113 >> Ext. TC 25* >> Busy * Denotes rarely used + Denotes only if secondary channel implemented # Denotes only on synchronous interfaces >> Denotes from DTE to DCE << Denotes from DCE to DTE == Denotes Ground line CCITԠ Internationa Telegrap an Telephon堠 Consultativ Committee TYPES OF DATA COMMUNICATIONS Ther ar tw way o sendin dat serially The ar Asynchronou an Synchronous Asynchronou seria젠 involve sendin informatio wit precis timin betwee bit o give character bu wit arbitraril lon interval betwee characters I orde t allo thi variabl lengt interval certai overhea informatio i require o eac character Normally durin a inter-characte ga th lin i a logi state Whe th characte starts star bi (logi 0 is alway first Onc th star bi ha occurre th othe dat bit follow leas significan bi first Ther ar normall o dat bit followe b parit bit I runnin wit "eve parity" thi bi wil b se o rese t mak a evn numbe o o dat bits Followin th parit bi (i used ar o "sto bits" Thes sto bit ar alway logi an simpl insur tha th lin i idle fo on o tw bi time(s whil th hardwar re-cycle fo th堠 nex star bi. UARԠ (Universa젠 Asynchronou Receiver/Transmitter ca b use t conver paralle t o fro Asynchronou seria data. Synchronou seria involve sendin character no onl wit precis timin betwee bit o give character bu a regula intervals Dat i normall set i larg block wit n ga betwee characters N overhea i require o eah character althoug parit i stil sometime used Ther i certai informatio require a th star an en o eac蠠 block Synchronou dat transmission ae normall mor intelligen tha asynchronous an ma reques re-transmissio o block receive wit errors. ELECTRICAL CHARACTERISTICS Th character transmitte b a RS-23 devic ar sen ou t th I/ por th bau rat selecte b interna switche o software Th characte i made u o o bit a define b th appropriat cod chart Fo ASCI characte th capita i sen a 4 hex Th binar cod i 010 000 wit bein the leas significan bit an th lef mos bein th mos significan bit Th followin diagra i wha i see a th outpu port Bi flo i fro lef t right. ---- -------------------- ---- stop S 1 0 0 0 0 0 1 0 bits ---- ---- -------- Logic 1 is low as shown. S Denotes start bit NON-STANDARD WIRING CONNECTIONS Ther ar severa way o hookin tw non-standar RS-232 device together bu th followin thre ar th mos common I onl on wa communicatio i require minimu o tw wire i al tha wil b required Al handshakin condition ca b satisfie b loopin bac th appropriat signal o bot end o th cabl (se Nul Mode diagra below) Th thre typica connection ar nul modem n handshake an ful handshake Th followin diagram sho th necessar wiring B carefu t not tha th manufacture ma wir th devic eithe a DT o DCE Consul th manua fo fina verificatio o pinouts. NULL MODEM NO HANDSHAKE FULL HANDSHAKE 1********1 1********1 1********1 2--------3 2--------3 2--------3 3--------2 3--------2 3--------2 4-| |-4 7--------7 4--------5 5-| |-5 5-| |-5 5--------4 7--------7 6-| |-6 7--------7 6-| |-6 8-| |-8 6------|-8 8-| |-8 20-| |-20 |-20 20-| |-20 8-|------6 20-| NOTE: Pin 1 is optional for Chassis Ground between Terminals. This information furnished for all computer users. I have spent many hours to find the above information the hard way. LARRY KRAEMER R 2 BOX 190 JACKSON, MO. 63755